•Negative Resistance (-R)
The negative resistance is an indicator for judging the quality of oscillation circuits. A circuit might not oscillate due to aging, temperature, voltage change etc., if the negative resistance of an oscillation circuit is not good enough.
Negative Resistance Measurement Method:
1. Connect the resistance (R) to the circuit in series with a quartz crystal.
2. Adjust R so that oscillation can start (or stop).
3. Measure R when oscillation just starts (or stops) in above (2).
4. Calculate the negative resistance using the formula: -R = R + R1
5. It is preferable when -R, -R > RL x (5 to 10)
RL= R1x (1+ C0/CL)^2
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•Frequency vs Load Capacitance
Since the crystal oscillator frequency will change when the load capacitance changes, we can change the load capacitance with a capacitor bank or varactor & thus change the crystal oscillator frequency in some applications.
  
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•Introduction to Crystals
Equivalent Circuit of a Crystal Unit
C0:Shunt Capacitance
L1:Motional Inductance
C1:Motional Capacitance
R1:Series Resistance
Crystal Cutting Angles & AT-cut
Frequency vs Temperature Characteristics
The motion mode and temperature coefficient of crystal units will depend upon the cutting angle.Figure 2 represents various cutting angles of Z-plate quartz crystal. The AT-cut is the most popular angle for crystal units. Figure 3 shows an At-cut characteristic representing a third-order curve.
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•Quartz crystal
A generic term “Piezoelectric quartz crystal “
Frequency Tolerance
The amount by which a frequency differs from the nominal frequency. Refer in 25oC
PPM
The abbreviation for “Parts Per Million.”
Load Capacitance ( CL )
CL stands for Load Capacitance. Load capacitance is defined as being the total capacitance present in an oscillator circuit as measured or calculated across the pins of the crystal. In order for the quartz crystal unit to function in a normal manner, there has to be some defined capacitance in oscillation circuit to match the crystal.
Load capacitance is a parameter specified by the customer, typically value range is 8pf ~ Series.
Cstray is the stray capacitance in the circuit, typically 2-5pF. If the oscillation frequency is high, the capacitor values should be increased to lower the frequency. If the frequency is low, the capacitor values should be decreased, thus raising the oscillation frequency. When CL =16pF, Ci and Co will be approximately 22-30pF each, plus the additional stray capacitance.
Temperature Range
The crystal can operate temperature range.
Frequency Stability
The allowable deviation is over a specified temperature range. The deviation is referenced to the measured frequency at 25oC
E.S.R.
The abbreviation for “Equivalent Series Resistance.” A crystal unit has a resistive element.It is different value at frequency range.
Fundamental Mode
The lowest frequency at which a resonator plate will oscillate.
The physical dimensions of the plate determine this frequency.
3rd Overtone
Threefold multiple of the fundamental frequency.
Driver Level
The amount of power dissipated by the oscillating crystal unit.
The expressed in terms of microwatt (uW)
Aging
The change in the frequency or the resistance of crystal unit with the passage of time.
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•XO
Phase Jitter
Phase Jitter is variations in phase of the leading and trailing signal edges of a digital or sine wave signal from their ideal positions in time.
Period jitter
Period jitter compares the length of each period to the average (Tave) period of an ideal clock over a defined averaging period. Each data point would be generated by subtracting (Tn-Tave) where n is the period being measured.
Period jitter is a standard measurement for oscillators. The period jitter consists of peak to peak period jitter and RMS (Root Mean Squared) period jitter. The RMS period jitter is the standard deviation of the peak to peak period jitter.
Warm - Up
The time required for an oscillator frequency to settle to within a given tolerance of the frequency several hours later.
Start-Up or Start time
The period from the instant voltage is applied to the oscillator until the oscillator output is over 90% Vdd and stabilized.
Load (Fan out)
The capacity of the oscillator to drive output devices. CMOS outputs are specified in xxpF (CMOS 15pF or CMOS 50pF).
Fall / Rise Time
The time required for a signal to go from logic 1 to logic 0 or form logic 0 to logic 1.
Tri - State Pin (Enable / Disable)
The enable / disable pin is similar to an on/off switch. A low or logic 0 on the tri-state pin causes the unit not to oscillate and high impedance.A high or logic 1 signal or open on the tri-state pin allow the unit to work an normal producing the specified output.
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•VCXO
Absolute Pull Range - APR
Absolute Pull Range or APR is defined as the minimum guaranteed controllable frequency variation from nominal beyond all variations in temperature, aging, power supply and load.
Pulling Range
The Frequency Pulling range of a VCXO is defined as the maximum change in output frequency that can be attained via the Control Voltage.
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